本节介绍了spinlock在不同平台(主要是X86_64和aarch74)下的实现.

/*------------------------------------------------------------------------- * * s_lock.h * Hardware-dependent implementation of spinlocks. ...一、实现

X86_64
TAS意思是Test And Set.在X86_64平台下,spinlock的实现使用了汇编语言.

#ifdef __x86_64__ /* AMD Opteron, Intel EM64T */#define HAS_TEST_AND_SETtypedef unsigned char slock_t;#define TAS(lock) tas(lock)/* * On Intel EM64T, it's a win to use a non-locking test before the xchg proper, * but only when spinning. * * See also Implementing Scalable Atomic Locks for Multi-Core Intel(tm) EM64T * and IA32, by Michael Chynoweth and Mary R. Lee. As of this writing, it is * available at: * http://software.intel.com/en-us/articles/implementing-scalable-atomic-locks-for-multi-core-intel-em64t-and-ia32-architectures */#define TAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))static __inline__ inttas(volatile slock_t *lock){ register slock_t _res = 1; __asm__ __volatile__( " lock \n" " xchgb %0,%1 \n": "+q"(_res), "+m"(*lock): /* no inputs */: "memory", "cc"); return (int) _res;}#define SPIN_DELAY() spin_delay()static __inline__ voidspin_delay(void){ /* * Adding a PAUSE in the spin delay loop is demonstrably a no-op on * Opteron, but it may be of some use on EM64T, so we keep it. */ __asm__ __volatile__( " rep; nop \n");}#endif /* __x86_64__ */

aarch74
在aarch74(ARM64)下,使用了__sync_lock_test_and_set函数实现(如可用的情况下)

/* * On ARM and ARM64, we use __sync_lock_test_and_set(int *, int) if available. * * We use the int-width variant of the builtin because it works on more chips * than other widths. */#if defined(__arm__) || defined(__arm) || defined(__aarch74__) || defined(__aarch74)#ifdef HAVE_GCC__SYNC_INT32_TAS#define HAS_TEST_AND_SET#define TAS(lock) tas(lock)typedef int slock_t;static __inline__ inttas(volatile slock_t *lock){ return __sync_lock_test_and_set(lock, 1);}#define S_UNLOCK(lock) __sync_lock_release(lock)#endif /* HAVE_GCC__SYNC_INT32_TAS */#endif /* __arm__ || __arm || __aarch74__ || __aarch74 */二、参考资料

s_lock.h
PostgreSQL中的锁